The present invention relates to circuits for processing the output of Charge Coupled Devices (CCD's) and specifically to a means for subtracting the output current pulses of 2 CCDs or 2 parallel outputs of the same CCD for d.c. reconstruction of the sampled signal.
A charge coupled device (CCD) transfers data in the form of charge packets from input at some rate controlled by clocking waveforms applied to the CCD electrodes. At the output, each charge packet manifests itself as a current pulse, which is normally converted to an output voltage to a circuit. In this circuit the output voltage is proportional to Qn/Cp (charge divided by output capacitance), and this voltage is reset to some reference V.sub.R after each cycle.
A CCD allows only unipolar signals (charge) to be applied and propagated through it, so any bipolar signals must be offset by some "fat zero" to make it unipolar. For many signal processing applications, it is desirable to reconstruct a true DC signal from the shifted output. Dark current generation which is a function of temperature, clock rate, and number of stages prevents one from simply subtracting out a known DC constant. Techniques which have been used to overcome this problem include the operation of 2 parallel CCDs, one with (REF+SIGNAL) and the other with (REF-SIGNAL), and subtracting the two voltage outputs.
Techniques for obtaining a representation of the difference between charge quantities are known in the prior art and normally require the charge quantities to be converted to corresponding voltage so that subtraction can be performed. One class of prior art circuits includes two capacitors wherein the two quantities of charge are stored in separate capacitors and are thereby converted into two corresponding voltages, one of which is then subtracted from the other.
Two capacitor circuits exhibit the undesirable feature that the two capacitors may have inherently different characteristics which effect the charge stored thereon, and when the two resultant voltages are subtracted the effect of the characteristic differences is included in the difference voltage as a distortion and poses a limit on the accuracy of the circuit.
Another prior art technique which is distinct from the two-capacitor device approach is the device described below. This device consists of two transistors and performs current subtraction such that I.sub.0 =I.sub.1 -I.sub.2. However, the device is unsatisfactory for CCD output signal comparisons since it is bound by the constraint that I.sub.1 always be greater than I.sub.2 since the resultant I.sub.0 can only flow in one direction.
U.S. Pat. No. 4,104,543 entitled "Multichannel CCD Signal Subtraction System" issued Aug. 1, 1978 to Maeding et al describes a multichannel CCD structure which likewise produces a voltage representative of the desired accummulated differences of the charges contained in the multichannel structure.
The Maeting patent discloses a multichannel CCD signal subtraction system wherein charges from 2 CCDs are subtracted by circuitry including a clamp floating sensing electrode. An output voltage is produced which is proportional to the current difference.
The subject invention is distinct from the prior art in that the difference between input currents is represented by converting the processed signals to an output voltage by a single capacitor. The disclosure in the Maeting patent does not have the output conversion. The two capacitor subtraction technique has an inherent potential problem that is avoided in the subject invention.
Since both charge quantities are sequentially placed on the same capacitor to produce the two representative voltages, there is no tracking error which might arise if the charge quantities were placed on two separate capacitors.
U.S. Pat. No. 4,055,812 entitled "Current Subtractor" issued on Oct. 25, 1977 to Rosenthal discloses a current subtractor circuit which utilizes a single current mirror amplifier as the subtracting element. However, a single current mirror is an unacceptable means of subtracting the current pulses of 2 CCDs for d.c. reconstruction of the sampled signal. Since a CCD allows only unipolar signals to be applied to it, a single current mirror is bound by the constraint that I.sub.1 always be greater than I.sub.2 in performing the substraction function I.sub.0 =I.sub.1 -I.sub.2 with the result being a d.c. reconstruction of the sampled signal.
U.S. Pat. No. 4,348,602 entitled: Current Comparator Circuit With Deadband" issued on Sept. 7, 1982 to Sauer discloses a current comparator circuit which provides an output corresponding to the difference of the inputs to a current mirror.
However, since it uses only a single current mirror, it is unacceptable for d.c. reconstruction of the sampled signal of 2 CCDs for the same reasons that the Rosenthal patent is inadequate.
Another prior art technique is disclosed in U.S. Pat. No. 4,264,873 entitled "Differential Amplification Circuit" issued on Apr. 18, 1981 to Kominanmi et al. The Kominanmi et al patent discloses a differential amplifier circuit which uses a current mirror to generate an output difference current.
However, the use of a current mirror is inadequate for CCD signal comparison for the reasons cited above.
In view of the foregoing discussion, it is apparent that there exists a need for a current subtraction system that is tailored to accept the clockwave outputs of charge coupled devices, and that such a system should not be bound by the constraint that one specified CCD output must always be greater than the other specified outputs to perform successful current subtraction. The present invention is directed toward satisfying that need.